Neural networks in analog hardware--design and implementation issues

Area of Science:

• Computer Engineering
• Artificial Intelligence
• Hardware Accelerators

Background:

• Neural networks are increasingly implemented in hardware for enhanced performance.
• Analog hardware offers potential advantages in power efficiency and speed over digital counterparts.
• Understanding the design space of analog neural network implementations is crucial for future advancements.

Purpose of the Study:

• To review and classify analog hardware implementations of neural networks.
• To analyze the characteristics, trade-offs, and challenges associated with these implementations.
• To present a unified review of "VLSI friendly" algorithms for analog neural networks.

Main Methods:

• Classification of neural network hardware implementations based on defined criteria.
• Review and analysis of existing literature on analog neural network hardware.
• Discussion of key performance parameters including precision, chip area, power consumption, speed, and noise susceptibility.

Main Results:

• A taxonomy for classifying analog neural network implementations is presented.
• Key characteristics and trade-offs (e.g., precision vs. power) are discussed.
• Analysis of "VLSI friendly" algorithms suitable for analog hardware integration.

Conclusions:

• Analog hardware implementations offer unique advantages but also present specific challenges.
• Careful consideration of design parameters is essential for optimizing analog neural networks.
• Further research into "VLSI friendly" algorithms can accelerate the adoption of analog neural network hardware.