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Noise characteristic design of CMOS source follower and voltage amplifier for active semiconductor micro-electrodes
1School of Electrical Engineering, Seoul National University, Korea. kim@helios.snu.ac.kr
Abstract:
A noise performance design method for the pre-amplifiers of an active neural probe is given. The on-chip circuitry of the active neural probe consists of CMOS devices that show high-/low-frequency noise, so that the device noise can become dominant. Analysis of the signal-to-device-noise ratio (SDNR) for the CMOS source follower buffer and two-stage differential voltage amplifier is given. Closed-form expressions for the output noise power are derived and exploited to tailor the parameters that are controllable during circuit design. The output SDNR is calculated considering the real extracellular action potentials, the electrode-electrolyte interface and the noise spectrum of CMOS devices from typical foundries. It is shown that the output device noise power can be much higher than the output signal power if the devices at the input stage of the pre-amplifier are made as small as given fabrication technology permits. Quantitative information of the circuit parameters to achieve an SDNR higher than 5 for neural spikes with 60 microV amplitude are provided for both pre-amplifier types.
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