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Related Experiment Video

Updated: Jun 29, 2026

Quantum State Engineering of Light with Continuous-wave Optical Parametric Oscillators

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Published on: May 30, 2014

Quantum interferometric optical lithography: exploiting entanglement to beat the diffraction limit

Boto¹, Kok, Abrams

¹Jet Propulsion Laboratory, California Institute of Technology, Mail Stop 126-347, 4800 Oak Grove Drive, Pasadena, California 91109, USA.

Physical Review Letters

|September 16, 2000

Summary

This summary is machine-generated.

Researchers used quantum entanglement to overcome classical optical lithography limits. Entangled photons enable writing features N times smaller, significantly increasing semiconductor chip density.

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Last Updated: Jun 29, 2026

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Published on: September 14, 2018

Area of Science:

Quantum optics
Nanotechnology
Materials science

Background:

Classical optical lithography is limited by diffraction, restricting feature sizes to half the optical wavelength (λ/2).
Current semiconductor manufacturing faces limitations in feature size scaling with traditional methods.

Purpose of the Study:

To investigate the potential of nonclassical photon states for sub-diffraction-limit lithography.
To demonstrate a method for significantly enhancing the resolution and density of features written on a substrate.

Main Methods:

Utilizing nonclassical photon-number states, specifically entangled photons, for lithography.
Employing an N-photon absorbing substrate to enable feature writing at λ/(2N) resolution.
Demonstrating the generation of entangled photon pairs via optical parametric down-conversion for N=2.

Main Results:

Achieved feature sizes of λ/(2N), a significant improvement over classical limits.
Showcased the potential for a N^2 increase in elements on a semiconductor chip.
Successfully demonstrated the writing of arbitrary 2D patterns using entangled photon lithography.

Conclusions:

Nonclassical photon states offer a pathway to surpass classical diffraction limits in lithography.
Entangled photon lithography provides a scalable method for increasing semiconductor device density.
This technique holds promise for future advancements in micro- and nanofabrication.