Real time implementation of genetic algorithm cancellation of sinusoidal noise in ECG using TMS320C50 DSP processor

Power-line interference (either 50 Hz or 60 Hz) is a significant source of noise in biomedical recording. Elimination of power-line interference in the Electrocardiogram (ECG) signal by various methods have been proposed in the past. Despite the high common mode rejection ratio of the input amplifiers of the Electrocardiographs, recordings are often contaminated by power-line (mains) frequency interference, usually phase shifted with respect to the mains voltage. The use of conventional filter affects the signal components adjacent to the mains line frequency. A variety of adaptive filters for this purpose have been proposed but they require some adaptation period whenever there is change in the power-line interference. This paper describes a method of implementing the genetic algorithm noise cancellation in real time, using TMS320C50 based add-on DSP card that does the process of conversion and subtraction and the host PC doing the training process.