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Related Experiment Videos

ANNSyS: an Analog Neural Network Synthesis System.

Ismet Bayraktaroğlu1, Arif Selçuk Oğrenci, Gunhan Dündar

  • 1Computer Science and Engineering Department, UC San Diego, San Diego, USA

Neural Networks : the Official Journal of the International Neural Network Society
|March 29, 2003
PubMed
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This study presents a novel synthesis system for analog neural networks, enabling efficient on-chip training and minimizing circuit nonidealities for improved performance in MOS technology.

Area of Science:

  • Electrical Engineering
  • Computer Science
  • Artificial Intelligence

Background:

  • Analog neural networks offer potential advantages in power efficiency and speed for specific computational tasks.
  • Implementing analog neural networks in MOS technology requires robust design and training methodologies.
  • Circuit nonidealities can significantly impact the performance and learning capabilities of analog neural networks.

Purpose of the Study:

  • To present a novel synthesis system for analog neural networks.
  • To approximate on-chip training for analog neural networks.
  • To provide an optimal starting point for chip-in-the-loop training.

Main Methods:

  • Utilizing a circuit simulator and a silicon assembler for analog neural network synthesis.

Related Experiment Videos

  • Modeling analog neural network behavior using SPICE simulations for initial training.
  • Combining a circuit simulator with Madaline Rule III for software-based on-chip training approximation.
  • Employing a circuit simulator that partitions circuits into decoupled blocks for separate simulation.
  • Generating neural network layouts using a silicon assembler that reads analog standard cells from a library.

    • Main Results:

    • The developed system successfully approximates on-chip training for analog neural networks.
    • The system minimizes the impact of circuit nonidealities on neural network performance.
    • The synthesis system provides an effective starting point for chip-in-the-loop training.
    • Demonstrated system performance through several practical examples.

    Conclusions:

    • The presented synthesis system offers a viable approach for designing and training analog neural networks in MOS technology.
    • The integration of circuit simulation and silicon assembly facilitates efficient analog neural network implementation.
    • The method effectively addresses challenges related to circuit nonidealities and on-chip training.