Controlled fabrication of silicon nanowires by electron beam lithography and electrochemical size reduction

We demonstrate that electrochemical size reduction can be used for precisely controlled fabrication of silicon nanowires of widths approaching the 10 nm regime. The scheme can, in principle, be applied to wires defined by optical lithography but is here demonstrated for wires of approximately 100-200 nm width, defined by electron beam lithography. As for electrochemical etching of bulk silicon, the etching can be tuned both to the pore formation regime as well as to electropolishing. By in-situ optical and electrical characterization, the process can be halted at a certain nanowire width. Further electrical characterization shows a conductance decreasing faster than dimensional scaling would predict. As an explanation, we propose that charged surface states play a more pronounced role as the nanowire cross-sectional dimensions decrease.