Ricardo P Jacobi1, Mauricio Ayala-Rincón, Luis G A Carvalho
1Departamento de Ciência da Computação, Universidade de Brasília, Brasília, DF, Brazil. rjacobi@cic.unb.br
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This study introduces a novel reconfigurable systolic architecture for dynamic programming. This hardware acceleration offers significant speedups for sequence alignment and string matching tasks.
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