Design, fabrication and characterization of monolithic embedded parylene microchannels in silicon substrate

Po-Jui Chen1, Chi-Yuan Shih, Yu-Chong Tai

  • 1Department of Electrical Engineering, Divison of Engineering and Applied Science, California Institute of Technology, Pasadena, CA 91125, USA. pjchen@mems.caltech.edu

Lab on a Chip
|June 2, 2006
PubMed

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