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Related Experiment Videos

RAPID for high-performance computing systems: architecture and performance evaluation.

Avinash Karanth Kodi1, Ahmed Louri

  • 1Department of Electrical and Computer Engineering, University of Arizona, Tucson 85721, USA.

Applied Optics
|August 17, 2006
PubMed
Summary

High-performance computing systems face bottlenecks due to limited bandwidth and power issues. The proposed reconfigurable all-photonic interconnect for parallel and distributed systems (RAPID) architecture offers a scalable solution, improving performance and reducing latency.

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Area of Science:

  • Computer Engineering
  • Optical Communications
  • High-Performance Computing

Background:

  • High-performance computing systems (HPCS) face significant communication bottlenecks.
  • Limited bandwidth and increased power dissipation hinder performance and scalability at higher bit rates and longer distances.

Purpose of the Study:

  • To propose a novel optical-interconnect-based architecture for HPCS.
  • To address bandwidth density, power consumption, and scalability challenges in HPCS.

Main Methods:

  • Introduction of the reconfigurable all-photonic interconnect for parallel and distributed systems (RAPID) architecture.
  • Development of cost-effective alternatives: modified (M-RAPID) and extended (E-RAPID) versions.
  • Detailed simulation and comparative analysis against electrical HPCS interconnects.

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Main Results:

  • The RAPID architecture demonstrates significant improvements over electrical interconnects.
  • Achieved 30%-50% increased throughput.
  • Reduced network latency by 50%-75%.

Conclusions:

  • The RAPID architecture effectively alleviates communication bottlenecks in HPCS.
  • Offers enhanced performance, power optimization, and scalability.
  • Cost-effective alternatives (M-RAPID, E-RAPID) provide flexibility for implementation.