Adaptive WTA with an analog VLSI neuromorphic learning chip

Area of Science:

• Computational Neuroscience
• Neuromorphic Engineering
• Machine Learning

Background:

• Spiking neural networks (SNNs) offer a biologically plausible model for neural computation.
• Traditional Hebbian learning rules often rely on average firing rates.
• Neuromorphic very large scale integration (VLSI) chips enable efficient, low-power implementation of SNNs.

Purpose of the Study:

• To demonstrate that a spike-based learning rule can be tuned to exhibit rate-based Hebbian learning behavior.
• To investigate the influence of input statistics and time constants on this behavioral shift.
• To validate the rule's performance in a practical application on neuromorphic hardware.

Main Methods:

• Developed and analyzed a specific spike-based synaptic plasticity rule.
• Controlled the rule's behavior by manipulating input statistics and a single time constant.
• Implemented the learning rule on a neuromorphic VLSI chip within a spike signal image processing system (CAVIAR project).
• Evaluated performance using simulations and chip experiments with artificial and real sensor data.

Main Results:

• The spike-based learning rule successfully emulated rate-based Hebbian learning under specific conditions.
• The transition from spike-based to rate-based behavior was effectively controlled by input statistics and the time constant.
• The implemented system demonstrated classification capabilities on the neuromorphic chip.

Conclusions:

• A single, adaptable spike-based learning rule can achieve rate-based Hebbian learning, bridging two major learning paradigms.
• This approach allows for efficient implementation on neuromorphic hardware without explicit computation of long-term averages.
• The findings have implications for developing more sophisticated and efficient neural processing systems.