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Scene segmentation using neuromorphic oscillatory networks.

J Cosp¹, J Madrenas

¹Dept. of Electron. Eng., Tech. Univ. of Catalunya, Barcelona, Spain.

IEEE Transactions on Neural Networks

|February 5, 2008

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We developed a low-power analog very large-scale integration (VLSI) circuit for image segmentation using an oscillatory algorithm. This neuromorphic approach efficiently segments binary images with high noise tolerance.

Area of Science:

Neuromorphic Engineering
VLSI Design
Image Processing

Background:

Oscillatory network models offer potential for efficient image segmentation.
Implementing complex algorithms in analog very large-scale integration (VLSI) presents challenges in efficiency and performance.

Purpose of the Study:

To propose and validate an analog VLSI implementation of a simplified oscillatory segmentation algorithm.
To assess the performance, power consumption, and segmentation capabilities of the developed hardware.

Main Methods:

Developed a neuromorphic analog VLSI circuit based on an oscillatory segmentation algorithm with local excitation and global inhibition.
Simplified and adapted the original algorithm for efficient hardware implementation.
Manufactured and tested a 16x16-pixel testchip to demonstrate feasibility.

Related Experiment Videos

Main Results:

The analog VLSI implementation successfully segmented binary images.
Achieved significantly lower power consumption, segmentation time per cell, and system complexity compared to existing methods.
Demonstrated inherent noise tolerance in the network without additional components.

Conclusions:

The proposed analog VLSI implementation of the oscillatory segmentation algorithm is feasible and efficient.
This approach offers a low-power, high-speed solution for binary image segmentation.
Network performance considerations include accounting for oscillator delays arising from component mismatch and capacitance.