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A board system for high-speed image analysis and neural networks
1ATandT Bell Labs., Holmdel, NJ.
IEEE Transactions on Neural Networks
|January 1, 1996
Summary
A new high-speed platform integrates two ANNA neural network chips for advanced algorithms and image analysis. This system offers a tenfold speed increase for neural network applications and image processing tasks.
Area of Science:
- Computer Engineering
- Artificial Intelligence
- Image Processing
Background:
- Neural network applications and image analysis require high-performance computing platforms.
- Previous systems had limitations in speed and flexibility for complex algorithms.
Purpose of the Study:
- To develop a high-speed platform for diverse neural network algorithms and image analysis tasks.
- To enhance computational power and efficiency for tasks like filtering, feature extraction, and emulation of cellular neural networks.
Main Methods:
- Integration of two ANNA neural network chips onto a 6U VME board.
- Implementation of a controller using field-programmable gate arrays (FPGAs), memory, and bus interfaces.
- System designed for maximum speed and support of high compute power.
Main Results:
- The new system demonstrates a sustained speed of up to two billion connections per second (GC/s).
- Achieved a recognition speed of 1000 characters per second for tasks such as character recognition.
- The platform is approximately 10 times faster than previous board iterations.
Conclusions:
- The integrated ANNA chip system provides a significant advancement in high-speed neural network and image analysis platforms.
- The system's versatility supports variable neural network architectures and convolution-based image processing.
- The enhanced speed and performance enable efficient execution of complex computational tasks.
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