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Toward a general-purpose analog VLSI neural network with on-chip learning.

A J Montalvo1, R S Gyurcsik, J J Paulos

  • 1Ericsson Inc., Research Triangle Park, NC.

IEEE Transactions on Neural Networks
|January 1, 1997
PubMed
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This study presents a low-cost, general-purpose very large scale integration (VLSI) neural network chip. The design uses analog nonidealities for efficient learning and achieves high-density integration with a novel synapse architecture.

Area of Science:

  • Neuroscience
  • Computer Engineering
  • Integrated Circuit Design

Background:

  • Advancements in neural networks require efficient hardware implementations.
  • Analog Very Large Scale Integration (VLSI) offers high-density potential but faces challenges with nonidealities.
  • Developing cost-effective and high-performance neural network hardware is crucial for broader adoption.

Purpose of the Study:

  • To describe the essential elements for a general-purpose, low-cost VLSI neural network.
  • To demonstrate a proof-of-concept chip realizing the potential of analog VLSI.
  • To introduce a novel synapse design for efficient and reliable learning.

Main Methods:

  • Designed a 64-synapse, 8-neuron VLSI neural network chip.
  • Employed a learning algorithm tolerant of analog nonidealities.

Related Experiment Videos

  • Integrated a hybrid synapse architecture for dynamic and nonvolatile weight storage.
  • Configured a user-friendly, microprocessor-compatible interface for a one-hidden-layer topology.

    • Main Results:

    • Achieved a compact synapse size (4900 µm² in 2-µm technology).
    • Demonstrated fast and accurate learning with minimal external support.
    • Showcased reliable long-term storage without refreshing.
    • Successfully solved a four-bit parity problem in an average of 680 ms with 96% accuracy.

    Conclusions:

    • The developed VLSI neural network architecture is efficient and cost-effective.
    • The novel synapse design enables high-density analog VLSI with robust learning capabilities.
    • This proof-of-concept chip validates the feasibility of general-purpose analog neural networks for practical applications.