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Chaotic neuron models and their VLSI circuit implementations.

C C Hsu1, D Gobovic, M E Zaghloul

  • 1Center for Adv. Comput. Studies, Southwestern Louisiana Univ., Lafayette, LA.

IEEE Transactions on Neural Networks
|January 1, 1996
PubMed
Summary
This summary is machine-generated.

This study introduces a novel chaotic neuron model implemented on a CMOS VLSI chip. The baseline function concept controls collective neuron chaos, verified by Lyapunov exponents and chip measurements.

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Area of Science:

  • Neuroscience
  • Electrical Engineering
  • Chaos Theory

Background:

  • Chaotic dynamics in artificial neurons are crucial for complex computation.
  • Existing models often lack precise control over chaotic behavior.
  • Very Large Scale Integration (VLSI) implementation offers potential for efficient neuromorphic systems.

Purpose of the Study:

  • To propose and implement a novel chaotic neuron model in analog CMOS VLSI.
  • To introduce and utilize a 'baseline function' for controlling collective chaotic neuron behavior.
  • To experimentally validate the chaotic dynamics and functionality of the designed chip.

Main Methods:

  • Design of a chaotic neuron model utilizing a piecewise linear (PWL) N-shaped transfer function.
  • Introduction of a 'baseline function' to map neuron state to output, controlling chaos.
  • Analysis and verification of chaotic behavior using Lyapunov exponents.
  • Implementation of the model in an analog CMOS chip fabricated via MOSIS.
  • Experimental measurement and diagnosis of the fabricated chip's performance.

Main Results:

  • Successful design and fabrication of a chaotic neuron model on a CMOS VLSI chip.
  • Demonstration of the 'baseline function' as an effective tool for controlling collective chaotic neuron dynamics.
  • Experimental verification of the predicted chaotic behavior through chip measurements.
  • Validation of the model's theoretical underpinnings through practical implementation.

Conclusions:

  • The proposed chaotic neuron model with the baseline function offers a novel approach to controlling complex dynamics in neuromorphic systems.
  • The successful CMOS VLSI implementation demonstrates the feasibility of hardware realization for advanced neural computation.
  • This work contributes to the development of hardware for chaotic-based artificial intelligence and signal processing.