Analog VLSI model of binaural hearing

Area of Science:

• Auditory Neuroscience
• Biomedical Engineering
• Signal Processing

Background:

• Current models of auditory processing often struggle to integrate binaural and spectral sound information effectively.
• Developing biologically plausible computational models is crucial for advancing artificial auditory systems.
• Analog Very-Large-Scale Integration (VLSI) offers potential for efficient, real-time processing of complex sensory data.

Purpose of the Study:

• To propose and implement the stereausis model, a novel framework for auditory processing.
• To design and demonstrate a working analog VLSI chip embodying the stereausis model.
• To validate the chip's real-time computation of auditory representations using diverse sound stimuli.

Main Methods:

• Development of the stereausis model, a unified representation for binaural and spectral auditory information.
• Design and fabrication of a 100,000-transistor analog VLSI chip.
• Real-time continuous-time analog processing of two audio input signals (simulating binaural input).
• Generation of output signals compatible with direct driving of a color Cathode Ray Tube (CRT) display.

Main Results:

• Successful implementation of the stereausis model in a functional analog VLSI chip.
• Real-time computation of the stereausis representation from audio inputs.
• Demonstration of chip outputs for various artificial and speech sound stimuli.
• The chip's outputs were shown to be capable of directly driving a color CRT display.

Conclusions:

• The stereausis model provides a unified framework for encoding binaural and spectral auditory information.
• The developed analog VLSI chip successfully implements early auditory processing based on the stereausis model in real time.
• This work demonstrates a viable approach for creating biologically inspired, real-time auditory processing hardware.