Jove
Visualize
Contact Us
JoVE
x logofacebook logolinkedin logoyoutube logo
ABOUT JoVE
OverviewLeadershipBlogJoVE Help Center
AUTHORS
Publishing ProcessEditorial BoardScope & PoliciesPeer ReviewFAQSubmit
LIBRARIANS
TestimonialsSubscriptionsAccessResourcesLibrary Advisory BoardFAQ
RESEARCH
JoVE JournalMethods CollectionsJoVE Encyclopedia of ExperimentsArchive
EDUCATION
JoVE CoreJoVE BusinessJoVE Science EducationJoVE Lab ManualFaculty Resource CenterFaculty Site
Terms & Conditions of Use
Privacy Policy
Policies

Related Experiment Videos

Integrated pulse stream neural networks: results, issues, and pointers.

A Hamilton1, A F Murray, D J Baxter

  • 1Dept. of Electr. Eng., Edinburgh Univ.

IEEE Transactions on Neural Networks
|January 1, 1992
PubMed
Summary
This summary is machine-generated.

Related Concept Videos

You might also read

Related Articles

Articles linked to this work by shared authors, journal, and citation graph.

Sort by
Same author

Patterning of functional human astrocytes onto parylene-C/SiO<sub>2</sub> substrates for the study of Ca<sup>2+</sup> dynamics in astrocytic networks.

Journal of neural engineering·2018
Same author

Performance of the ATLAS trigger system in 2015.

The European physical journal. C, Particles and fields·2017
Same author

Reconstruction of primary vertices at the ATLAS experiment in Run 1 proton-proton collisions at the LHC.

The European physical journal. C, Particles and fields·2017
Same author

Jet reconstruction and performance using particle flow with the ATLAS Detector.

The European physical journal. C, Particles and fields·2017
Same author

Measurements of electroweak [Formula: see text] production and constraints on anomalous gauge couplings with the ATLAS detector.

The European physical journal. C, Particles and fields·2017
Same author

Topological cell clustering in the ATLAS calorimeters and its performance in LHC Run 1.

The European physical journal. C, Particles and fields·2017
Same journal

Universal perceptron and DNA-like learning algorithm for binary neural networks: LSBF and PBF implementations.

IEEE transactions on neural networks·2013
Same journal

Guest editorial: special section on white box nonlinear prediction models.

IEEE transactions on neural networks·2011
Same journal

Data-based fault-tolerant control of high-speed trains with traction/braking notch nonlinearities and actuator failures.

IEEE transactions on neural networks·2011
Same journal

Guest editorial: special section on data-based control, modeling, and optimization.

IEEE transactions on neural networks·2011
Same journal

Neural network-based multiple robot simultaneous localization and mapping.

IEEE transactions on neural networks·2011
Same journal

Data-driven model-free adaptive control for a class of MIMO nonlinear discrete-time systems.

IEEE transactions on neural networks·2011
See all related articles

This study presents analog very large-scale integration (VLSI) circuits for pulse stream neural networks. The novel designs address processing variations and enable large-scale system integration for advanced neural computing.

Area of Science:

  • Neuroscience
  • Computer Engineering
  • Electrical Engineering

Background:

  • Analog very large-scale integration (VLSI) circuits are crucial for developing efficient neural network hardware.
  • Pulse stream neural networks offer a promising alternative for neuromorphic computing architectures.
  • Challenges exist in achieving robustness and scalability in analog neural network implementations.

Purpose of the Study:

  • To report results from working analog VLSI implementations of two distinct pulse stream neural network models.
  • To demonstrate solutions for processing variations and synapse cascadability in analog neural systems.
  • To present a novel silicon-implemented strategy for interchip communication of neural states.

Main Methods:

  • Development and testing of analog VLSI circuits for pulse stream neural networks.

Related Experiment Videos

  • Implementation of techniques to ensure invariance to processing variations.
  • Design and validation of a scalable interchip communication architecture for neural states.

    • Main Results:

    • Successful fabrication and testing of two analog pulse stream neural network circuits.
    • Demonstrated robustness against processing variations.
    • Validated interchip communication strategy for large-scale neural network systems.

    Conclusions:

    • The developed analog VLSI circuits offer practical solutions for building large-scale, robust pulse stream neural networks.
    • The findings contribute to overcoming limitations in massively parallel analog computing systems.
    • This work advances the development of efficient neuromorphic hardware.