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Updated: Jul 7, 2026

Real-time Electrophysiology: Using Closed-loop Protocols to Probe Neuronal Dynamics and Beyond
Published on: June 24, 2015
VLSI implementation of synaptic weighting and summing in pulse coded neural-type cells
G Moon1, M E Zaghloul, R W Newcomb
1Dept. of Electr. Eng. and Comput. Sci., George Washington Univ., DC.
Abstract:
Presents the hardware realization for synaptic weighting and summing using pulse-coded neural-type cells (NTCs). The basic information processing element (NTC) encodes the information into the form of pulse duty cycles using voltage-controlled resistors, for which a pulse duty cycle modulation technique is proposed. Summation is executed by a simple capacitor circuit as a current integrator. Layouts and measurements on a fabricated integrated design are included.
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