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A VLSI neural processor for image data compression using self-organization networks.

W C Fang1, B J Sheu, O C Chen

  • 1Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA.

IEEE Transactions on Neural Networks
|January 1, 1992
PubMed
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A novel adaptive electronic neural network processor achieves high-speed image compression using a frequency-sensitive self-organization algorithm, offering near-optimal results efficiently.

Area of Science:

  • * Electronic Engineering
  • * Computer Science
  • * Artificial Intelligence

Background:

  • * Conventional vector quantization algorithms face limitations in speed and efficiency for image compression.
  • * Adaptive neural networks offer a promising approach for optimizing data processing tasks.

Purpose of the Study:

  • * To develop and evaluate an adaptive electronic neural network processor for high-speed image compression.
  • * To compare the performance of the proposed neural network against conventional vector quantization methods.
  • * To demonstrate the feasibility and efficiency of a mixed-signal design for neural computation in image compression.

Main Methods:

  • * Implemented a frequency-sensitive self-organization algorithm for adaptive vector quantization.
  • * Designed a neural network processor featuring a pipelined codebook generator and a paralleled vector quantizer.

Related Experiment Videos

  • * Utilized a mixed-signal design combining analog circuitry for neural computation and digital circuitry for address processing.
  • * Fabricated and tested a prototype chip for a 25-dimensional adaptive vector quantizer with 64 code words.

    • Main Results:

    • * The neural network processor achieved a time complexity of O(1) for each quantization vector.
    • * The prototype chip, fabricated using 2.0 μm scalable CMOS technology, occupies 4.6 mmx6.8 mm.
    • * Demonstrated a computing capability of up to 3.2 billion connections/s.
    • * Experimental results confirmed the efficiency and near-optimal performance of the proposed method.

    Conclusions:

    • * The developed adaptive electronic neural network processor is highly efficient for high-speed image compression.
    • * The mixed-signal design approach enables powerful neural computation on a compact chip.
    • * The system achieves near-optimal compression results, outperforming conventional methods in speed and efficiency.