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Related Experiment Video

Updated: Jul 6, 2026

Metal-Assisted Electrochemical Nanoimprinting of Porous and Solid Silicon Wafers
09:18

Metal-Assisted Electrochemical Nanoimprinting of Porous and Solid Silicon Wafers

Published on: February 8, 2022

Nanowire lithography on silicon.

Alan Colli1, Andrea Fasoli, Simone Pisana

  • 1Nokia Research Centre Cambridge U.K., c/o Nanoscience Centre, Cambridge CB3 0FF, UK.

Nano Letters
|April 5, 2008
PubMed
Summary
This summary is machine-generated.

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This study demonstrates silicon dioxide nanowire lithography (NWL) for fabricating silicon devices. This technique enables the creation of various architectures, including field-effect transistors and 3D stacked nanowire structures.

Area of Science:

  • Materials Science
  • Nanotechnology
  • Semiconductor Device Fabrication

Background:

  • Nanowire lithography (NWL) is a technique that utilizes nanowires (NWs) as etch masks.
  • Existing NWL methods require complex chemical synthesis and assembly of NWs.
  • Developing simpler and more compatible NWL systems is crucial for advanced device fabrication.

Purpose of the Study:

  • To demonstrate the efficacy of silicon dioxide (SiO2) nanowires for NWL on crystalline silicon.
  • To fabricate diverse silicon-based architectures and devices using SiO2 NWL.
  • To explore the electrical properties of NW networks and 3D structures created via NWL.

Main Methods:

  • Growth and chemical assembly of SiO2 nanowires.
  • Application of SiO2 NWs as etch masks on crystalline silicon substrates.

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Flow-assisted Dielectrophoresis: A Low Cost Method for the Fabrication of High Performance Solution-processable Nanowire Devices
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Preparation of Silicon Nanowire Field-effect Transistor for Chemical and Biosensing Applications
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Preparation of Silicon Nanowire Field-effect Transistor for Chemical and Biosensing Applications

Published on: April 21, 2016

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Last Updated: Jul 6, 2026

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09:18

Metal-Assisted Electrochemical Nanoimprinting of Porous and Solid Silicon Wafers

Published on: February 8, 2022

Flow-assisted Dielectrophoresis: A Low Cost Method for the Fabrication of High Performance Solution-processable Nanowire Devices
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Flow-assisted Dielectrophoresis: A Low Cost Method for the Fabrication of High Performance Solution-processable Nanowire Devices

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  • Ink-jetting of SiO2 NWs from solution to form NW masks.
  • Fabrication of planar field-effect transistors and 3D stacked NW arrays.
  • Electrical characterization of fabricated devices and NW networks.

    • Main Results:

    • SiO2 NWs were successfully used as etch masks for NWL on crystalline silicon.
    • Planar field-effect transistors with single SOI-NW channels showed low contact resistance (<20 kΩ) and scalable performance.
    • Ink-jetted SiO2 NW masks enabled the fabrication of monolithic, single-crystalline NW networks with consistent conductivity.
    • A novel method for creating vertically stacked NW arrays using periodic undercutting was developed.

    Conclusions:

    • SiO2 NWs offer a simple and compatible system for implementing NWL.
    • NWL with SiO2 NWs facilitates the fabrication of a wide range of silicon architectures and devices.
    • The technique shows potential for creating complex 1D, network, and 3D nanostructures for electronic applications.