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Design and construction of the high-speed optoelectronic memory system demonstrator
Roberto Barbieri1, Philippe Benabes, Thomas Bierhoff
1Heriot-Watt University, Riccarton, Edinburgh, UK.
Applied Optics
|July 3, 2008
Summary
This study introduces an optoelectronic memory system to reduce latency in multiprocessor computers. Demonstrators were built and tested, combining optical technologies to enhance system performance.
Area of Science:
- Computer Engineering
- Optoelectronics
- Materials Science
Background:
- Multiprocessor computer systems face significant latency challenges.
- Optoelectronics and advanced packaging offer potential solutions.
- Current systems require improved memory and processor integration.
Purpose of the Study:
- To develop and evaluate a high-speed optoelectronic memory system.
- To reduce latency in multiprocessor systems.
- To assess the manufacturability of integrated optical technologies.
Main Methods:
- System demonstrators combining fiber, free-space, and planar integrated optical waveguides were constructed.
- Modeling and simulation techniques were developed for board-integrated waveguides and optical interfacing.
- Fabrication, assembly, and simulation of key system components were performed.
Main Results:
- Demonstrators successfully integrated various optical technologies.
- Modeling provided insights into waveguide transmission and optical interfacing.
- The system components were fabricated and assembled for evaluation.
Conclusions:
- The developed optoelectronic memory system shows promise for reducing latency.
- Integrated optical technologies can augment electronic memory and processor components.
- Further evaluation of manufacturability is supported by the system demonstrators.
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