A CMOS neuroelectronic interface based on two-dimensional transistor arrays with monolithically-integrated circuitry

The ability to monitor and to elicit neural activity with a high spatiotemporal resolution has grown essential for studying the functionality of neuronal networks. Although a variety of microelectrode arrays (MEAs) has been proposed, very few MEAs are integrated with signal-processing circuitry. As a result, the maximum number of electrodes is limited by routing complexity, and the signal-to-noise ratio is degraded by parasitics and noise interference. This paper presents a single-chip neuroelectronic interface integrating oxide-semiconductor field-effect transistors (OSFETs) with signal-processing circuitry. After the chip was fabricated with the standard complementary-metal-oxide-semiconductor (CMOS) process, polygates of specific transistors were etched at die-level to form OSFETs, while metal layers were retained to connect the OSFETs into two-dimensional arrays. The complete removal of polygates was confirmed by high-resolution image scanners, and the reliability of OSFETs was examined by measuring their electrical characteristics. Through a gate oxide of only 7nm thick, each OSFET can record and stimulate neural activity extracellularly by capacitive coupling. The capability of the full chip in neural recording and stimulation was further experimented using the well-characterised escape circuit of the crayfish. Experimental results indicate that the OSFET-based neuroelectronic interface can be used to study neuronal networks as faithfully as conventional electrophysiological tools. Moreover, the proposed simple, die-level fabrication process of the OSFETs underpins the development of various field-effect biosensors on a large scale with on-chip circuitry.