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Related Concept Videos

Semiconductors01:22

Semiconductors

There is variation in the electrical conductivity of materials - metals, semiconductors, and insulators that are showcased with the help of the energy band diagrams.
Metals such as copper (Cu), zinc (Zn), or lead (Pb) have low resistivity and feature conduction bands that are either not fully occupied or overlap with the valence band, making a bandgap non-existent. This allows electrons in the highest energy levels of the valence band to easily transition to the conduction band upon gaining...

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Related Experiment Video

Updated: Jun 23, 2026

Silicon Microchips for Manipulating Cell-cell Interaction
23:21

Silicon Microchips for Manipulating Cell-cell Interaction

Published on: August 30, 2007

Nanoslits in silicon chips.

Thomas Aref1, Matthew Brenner, Alexey Bezryadin

  • 1Department of Physics, University of Illinois at Urbana-Champaign, Urbana, IL 61801, USA.

Nanotechnology
|May 7, 2009
PubMed
Summary
This summary is machine-generated.

Researchers created 100 nm scale silicon slits using potassium hydroxide (KOH) etching and focused ion beam milling. These precisely fabricated slits enable advanced applications in electron microscopy and nanowire deposition.

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Area of Science:

  • Materials Science
  • Nanotechnology
  • Microfabrication

Background:

  • Potassium hydroxide (KOH) etching of silicon wafers creates V-shaped etch pits.
  • Controlling etch pit depth is crucial for nanoscale fabrication.
  • Existing methods for creating nanoscale features can be complex or lack precision.

Purpose of the Study:

  • To develop methods for fabricating 100 nm scale silicon slits.
  • To explore techniques for reducing silicon thickness at etch pit tips.
  • To enable new applications in microscopy and nano-device fabrication.

Main Methods:

  • Utilizing potassium hydroxide (KOH) etching with optical feedback to reduce silicon thickness to ~5 microm.
  • Developing two fabrication routes: sonication-assisted KOH etching and focused ion beam (FIB) milling.
  • Creating slits that taper from ~850 microm to 100-200 nm across the silicon chip.

Main Results:

  • Successfully fabricated 100 nm scale silicon slits penetrating macroscopic chips.
  • Demonstrated two distinct methods: one low-resolution and one high-control technique.
  • Achieved controlled tapering of slit width from microscale to nanoscale.

Conclusions:

  • Developed versatile methods for fabricating nanoscale silicon slits.
  • The fabricated slits are suitable for transmission electron microscopy sample preparation and electrical measurements.
  • The slits can serve as nanostencils for seamless nanowire deposition and integration with contact pads.