High-speed (2.5 Gbps) reconfigurable inter-chip optical interconnects using opto-VLSI processors

Area of Science:

• Optoelectronics
• Computer Engineering
• Photonics

Background:

• Reconfigurable optical interconnects are crucial for flexible, high-performance communication in multi-chip systems.
• Efficient parallel signal processing demands adaptable inter-chip communication architectures.

Purpose of the Study:

• To demonstrate a proof-of-concept for 2.5 Gbps reconfigurable optical interconnects using Opto-VLSI processors.
• To showcase the flexibility of the architecture for single, multicasting, and parallel interconnects.

Main Methods:

• Utilized Opto-VLSI processors as beam steerers and multicasters.
• Integrated an 850nm vertical cavity surface emitting lasers (VCSEL) array and a photodiode (PD) array onto a PCB.
• Drove Opto-VLSI processors with digital phase holograms for steering and multicasting.

Main Results:

• Successfully demonstrated 2.5 Gbps reconfigurable optical interconnects.
• Experimentally validated the architecture through three distinct scenarios (single, multicasting, parallel).
• Achieved high-speed N-to-N optical interconnects.

Conclusions:

• This work presents the first reported high-speed reconfigurable N-to-N optical interconnects architecture.
• The demonstrated architecture significantly impacts the flexibility and efficiency of large shared-memory multiprocessor machines.