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Related Concept Videos

Metal-Semiconductor Junctions01:24

Metal-Semiconductor Junctions

The contact of metal and semiconductor can lead to the formation of a junction with either Schottky or Ohmic behavior.
Schottky Barriers
Schottky barriers arise when a metal with a work function (Φm) contacts a semiconductor with a different work function (Φs). Initially, electrons transfer until the Fermi levels of the metal and semiconductor align at equilibrium. For instance, if Φm > Φs, the semiconductor Fermi level is higher than the metal's before contact. The semiconductor's...
Biasing of Metal-Semiconductor Junctions01:27

Biasing of Metal-Semiconductor Junctions

Biasing metal-semiconductor junctions involves applying a voltage across the junction. Specifically, the metal is connected to a voltage source, while the semiconductor is grounded. This technique is essential for controlling the direction and magnitude of current flow in electronic devices, including diodes, transistors, and photovoltaic cells.
In Schottky junctions, where the semiconductor is n-type, applying a positive voltage to the metal relative to the semiconductor reduces its Fermi...
Field Effect Transistor01:29

Field Effect Transistor

Field-effect transistors (FETs) are integral to electronic circuits and distinguished by their three-terminal setup: the gate, drain, and source. These transistors operate as unipolar devices, which utilize either electrons or holes as charge carriers, in contrast to bipolar transistors, which use both types of carriers. The primary function of the FET is to modulate the flow of these carriers from the source to the drain through a channel. The voltage difference between the gate and source...
Characteristics of MOSFET01:17

Characteristics of MOSFET

Metal-oxide-semiconductor field-effect Transistors, or MOSFETs, play a critical role in electronic circuits. They are primarily utilized for amplifying and switching signals.
Various vital parameters influence their functionality, which is crucial for theory and electronics applications. First, channel dimensions, precisely length, and width, are pivotal. The size of these channels affects the transistor's ability to carry current and switching speeds; shorter channels typically enable quicker...
Biasing of FET01:22

Biasing of FET

Biasing a Junction Field Effect Transistor (JFET) is crucial for setting operational parameters and ensuring efficient functioning in electronic circuits. JFETs are characterized by using a single carrier type in N-channel or P-channel configurations, where the channel is surrounded by PN junctions. These junctions are central to the device's ability to control current flow.
In an N-channel JFET, the structure consists of N-type material forming the channel on a P-type substrate, with the gate...
MOSFET: Enhancement Mode01:22

MOSFET: Enhancement Mode

Enhancement-mode MOSFETs are pivotal components in electronics, distinguished by their capacity to act as highly efficient switches. They are part of the larger family of metal-oxide Semiconductor Field-Effect Transistors (MOSFETs). They are available in two types: p-channel and n-channel, each tailored to specific polarity operations.
In their basic form, enhancement-mode MOSFETs are typically non-conductive when the gate-source voltage (Vgs) is zero. This default 'off' state means no current...

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Updated: Jun 18, 2026

Fabrication of Gate-tunable Graphene Devices for Scanning Tunneling Microscopy Studies with Coulomb Impurities
11:42

Fabrication of Gate-tunable Graphene Devices for Scanning Tunneling Microscopy Studies with Coulomb Impurities

Published on: July 24, 2015

Screening and interlayer coupling in multilayer graphene field-effect transistors.

Yang Sui1, Joerg Appenzeller

  • 1School of Electrical and Computer Engineering and Birck Nanotechnology Center, Purdue University, West Lafayette, Indiana 47907, USA. sui@purdue.edu

Nano Letters
|July 31, 2009
PubMed
Summary
This summary is machine-generated.

This study investigates multilayer graphene field-effect transistors, revealing unique thickness-dependent performance. A resistor network model explains charge distribution and noise reduction in these advanced electronic devices.

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Area of Science:

  • Materials Science
  • Condensed Matter Physics
  • Nanotechnology

Background:

  • Nanoscale transistors are crucial for modern electronics.
  • Graphene field-effect transistors (GFETs) offer potential for high performance.
  • Understanding charge and current distribution is key for optimizing GFET reliability.

Purpose of the Study:

  • To systematically study charge and current distribution in multilayer graphene field-effect transistors (MGFETs).
  • To investigate the thickness dependence of key transistor performance metrics.
  • To develop a model explaining experimental findings without altering graphene's fundamental electronic structure.

Main Methods:

  • Experimental characterization of MGFETs with varying layer counts.
  • Analysis of on-state current (I(on)), off-state current (I(off)), and I(on)/I(off) ratio.
  • Development and application of a resistor network model incorporating screening and interlayer coupling.

Main Results:

  • Observed a distinct thickness dependence for I(on), I(off), and the I(on)/I(off) ratio in MGFETs.
  • The proposed resistor network model successfully explains the experimental observations.
  • Demonstrated noise reduction in few-layer graphene transistors, consistent with the model.

Conclusions:

  • The resistor network model provides a valid framework for understanding MGFET behavior.
  • Performance and reliability improvements in scaled MGFETs can be achieved through understanding thickness-dependent effects.
  • The model's validity is independent of modifications to graphene's linear energy-band structure.