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Updated: Jun 16, 2026

Optimized Fabrication Procedure for High-Quality Graphene-based Moiré Superlattice Devices
Published on: July 11, 2025
Graphene synthesis on cubic SiC/Si wafers. perspectives for mass production of graphene-based electronic devices
Victor Yu Aristov1, Grzegorz Urbanik, Kurt Kummer
1Leibniz Institute for Solid State and Materials Research, D-01069 Dresden, Germany. V.Aristov@ifw-dresden.de
Abstract:
The outstanding properties of graphene, a single graphite layer, render it a top candidate for substituting silicon in future electronic devices. The so far exploited synthesis approaches, however, require conditions typically achieved in specialized laboratories and result in graphene sheets whose electronic properties are often altered by interactions with substrate materials. The development of graphene-based technologies requires an economical fabrication method compatible with mass production. Here we demonstrate for the fist time the feasibility of graphene synthesis on commercially available cubic SiC/Si substrates of >300 mm in diameter, which result in graphene flakes electronically decoupled from the substrate. After optimization of the preparation procedure, the proposed synthesis method can represent a further big step toward graphene-based electronic technologies.

