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Related Experiment Video

Updated: Jun 13, 2026

A Standard and Reliable Method to Fabricate Two-Dimensional Nanoelectronics

A Standard and Reliable Method to Fabricate Two-Dimensional Nanoelectronics

Published on: August 28, 2018

NiO resistive random access memory nanocapacitor array on graphene.

Jong Yeog Son¹, Young-Han Shin, Hyungjun Kim

¹Department of Materials Science and Engineering, and Division of Advanced Materials Science, Pohang University of Science and Technology, Pohang 790-784, Korea.

|May 5, 2010

Summary

Researchers developed a Nickel Oxide (NiO) Resistive Random-Access Memory (RRAM) nanocapacitor array on a graphene sheet. This novel structure demonstrated lower operating voltages compared to devices on bare substrates, paving the way for efficient memory applications.

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Published on: May 13, 2020

Area of Science:

Materials Science
Nanoscience
Electrical Engineering

Background:

Resistive Random-Access Memory (RRAM) offers promising non-volatile memory solutions.
Graphene's unique electronic properties make it an attractive material for advanced electronic devices.
Fabricating high-density, low-power memory arrays requires precise control over nanostructure formation.

Purpose of the Study:

To fabricate a Nickel Oxide (NiO) RRAM nanocapacitor array on a graphene-based substrate.
To investigate the switching characteristics and performance of NiO RRAM devices integrated with graphene.
To compare the operating voltages of NiO RRAM on graphene versus a bare substrate.

Main Methods:

Fabrication of a NiO RRAM nanocapacitor array using an anodic aluminum oxide (AAO) nanotemplate on a graphene-coated Nb-doped SrTiO(3) substrate.
Deposition of NiO and Platinum (Pt) layers to form Pt/NiO/graphene capacitors with controlled dimensions (approx. 30 nm diameter).
Characterization of the electrical switching behavior, specifically unipolar switching, of the fabricated RRAM array.

Main Results:

Successful fabrication of a NiO RRAM nanocapacitor array with uniform dimensions on a graphene sheet.
Confirmation of typical unipolar switching characteristics in the NiO RRAM devices.
Demonstration that the NiO RRAM array on graphene exhibited significantly lower SET and RESET voltages compared to devices on a bare Nb-doped SrTiO(3) substrate.

Conclusions:

The integration of NiO RRAM nanocapacitors with graphene is feasible and beneficial for reducing operating voltages.
Graphene acts as an effective conductive layer, enhancing the performance of NiO RRAM devices.
This study highlights a promising approach for developing low-power, high-performance non-volatile memory technologies.