Bit-serial architecture for optical computing.

Area of Science:

• Computer Engineering
• Optoelectronics
• Digital Systems

Background:

• Traditional electronic computers face limitations in speed and power consumption.
• Optical computing offers potential for higher speeds and lower power consumption.
• Implementing stored-program digital optical computers presents unique design challenges.

Purpose of the Study:

• To describe the design of a complete, stored-program digital optical computer.
• To demonstrate a proof-of-principle prototype using specific optical components.
• To address key design issues in optical computation, such as propagation delays and flip-flop-free circuits.

Main Methods:

• Utilizing lithium niobate (LiNbO3) directional couplers as logic elements.
• Employing fiber-optic delay lines as memory elements for data storage.
• Developing speed-scalable architectures that maintain performance across different clock speeds and sizes.
• Implementing signal amplitude restoration and resynchronization by switching in a fresh system clock copy.

Main Results:

• A fully functional, proof-of-principle prototype design is presented.
• Speed-scalable architectures were developed to overcome propagation delay challenges.
• Novel techniques for signal restoration and resynchronization were successfully implemented.
• The design principles were exemplified through the creation of an n-bit counter and a stored-program bit-serial computer.

Conclusions:

• The proposed optical computer architecture is feasible and offers significant performance potential.
• The prototype can operate in the 100-MHz range with current components and potentially reach 0.1-1 THz with future advancements.
• This work lays the foundation for high-performance digital optical computing systems.