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Updated: Jun 6, 2026

Closed-loop Neuro-robotic Experiments to Test Computational Properties of Neuronal Networks
Published on: March 2, 2015
An FPGA hardware/software co-design towards evolvable spiking neural networks for robotics application
S P Johnston1, G Prasad, L Maguire
1Intelligent Systems Research Centre, School of Computing and Intelligent Systems, Magee Campus, University of Ulster, Derry, Northern Ireland, BT47 7JL, UK.
Abstract:
This paper presents an approach that permits the effective hardware realization of a novel Evolvable Spiking Neural Network (ESNN) paradigm on Field Programmable Gate Arrays (FPGAs). The ESNN possesses a hybrid learning algorithm that consists of a Spike Timing Dependent Plasticity (STDP) mechanism fused with a Genetic Algorithm (GA). The design and implementation direction utilizes the latest advancements in FPGA technology to provide a partitioned hardware/software co-design solution. The approach achieves the maximum FPGA flexibility obtainable for the ESNN paradigm. The algorithm was applied as an embedded intelligent system robotic controller to solve an autonomous navigation and obstacle avoidance problem.
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