Related Experiment Video
Updated: Jun 4, 2026

Characterization of SiN Integrated Optical Phased Arrays on a Wafer-Scale Test Station
Published on: April 1, 2020
Nanophotonic integration in state-of-the-art CMOS foundries
Jason S Orcutt1, Anatol Khilo, Charles W Holzwarth
1Research Laboratory of Electronics, Massachusetts Institute of Technology, 77 Massachusetts Ave, Cambridge, Massachusetts 02139, USA. jsorcutt@mit.edu
Abstract:
We demonstrate a monolithic photonic integration platform that leverages the existing state-of-the-art CMOS foundry infrastructure. In our approach, proven XeF2 post-processing technology and compliance with electronic foundry process flows eliminate the need for specialized substrates or wafer bonding. This approach enables intimate integration of large numbers of nanophotonic devices alongside high-density, high-performance transistors at low initial and incremental cost. We demonstrate this platform by presenting grating-coupled, microring-resonator filter banks fabricated in an unmodified 28 nm bulk-CMOS process by sharing a mask set with standard electronic projects. The lithographic fidelity of this process enables the high-throughput fabrication of second-order, wavelength-division-multiplexing (WDM) filter banks that achieve low insertion loss without post-fabrication trimming.

