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Related Experiment Video

Updated: May 29, 2026

Examining Online Syntactic Processing of Spoken Complex Sentences in Chinese Using Dual-Modal Interference Tasks
08:32

Examining Online Syntactic Processing of Spoken Complex Sentences in Chinese Using Dual-Modal Interference Tasks

Published on: September 5, 2019

Parallel Parsing Algorithms and VLSI Implementations for Syntactic Pattern Recognition.

Y T Chiang1, K S Fu

  • 1School of Electrical Engineering, Purdue University, West Lafayette, IN 47907; Department of Electrical and Computer Engineering, Washington State University, Pullman, WA 99163.

IEEE Transactions on Pattern Analysis and Machine Intelligence
|August 27, 2011
PubMed
Summary
This summary is machine-generated.

This study introduces a parallel Earley

Related Experiment Videos

Last Updated: May 29, 2026

Examining Online Syntactic Processing of Spoken Complex Sentences in Chinese Using Dual-Modal Interference Tasks
08:32

Examining Online Syntactic Processing of Spoken Complex Sentences in Chinese Using Dual-Modal Interference Tasks

Published on: September 5, 2019

Area of Science:

  • Computer Science
  • Computational Linguistics

Background:

  • Earley's algorithm is a standard method for parsing context-free languages, with a time complexity of O(n³).
  • Syntactic pattern recognition often employs error-correcting parsing techniques.

Purpose of the Study:

  • To develop a parallel Earley's recognition algorithm using an "X*" operator.
  • To adapt the algorithm for execution on a triangular VLSI array for efficient parallel processing.
  • To present parallel algorithms for complete parsing and error-correcting recognition.

Main Methods:

  • Developed a parallel Earley's recognition algorithm restricted to context-free grammars that are ¿-free.
  • Implemented the algorithm on a triangular VLSI array architecture.
  • Simulated parallel parse-extraction, complete parsing, and error-correcting recognition algorithms.

Main Results:

  • The parallel algorithm recognizes strings of length n in 2n + 1 system time on the VLSI array.
  • A parallel complete parsing algorithm yields the correct right-parse in 2n + 1 system time.
  • The error-correcting recognition algorithm identifies erroneous strings of length n in 2n + 1 system time, providing an accurate error count.

Conclusions:

  • The proposed parallel Earley's algorithm offers significant speed improvements for parsing and recognition tasks.
  • The VLSI array implementation provides an efficient hardware solution for these parallel algorithms.
  • These parallel algorithms are particularly advantageous for applications in syntactic pattern recognition.