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Two novel low-power and high-speed dynamic carbon nanotube full-adder cells
Mehdi Bagherizadeh1, Mohammad Eshghi
1Science and Research Branch of Islamic Azad University, Tehran, Iran. m.bagherizadeh@srbiau.ac.ir.
Abstract:
In this paper, two novel low-power and high-speed carbon nanotube full-adder cells in dynamic logic style are presented. Carbon nanotube field-effect transistors (CNFETs) are efficient in designing a high performance circuit. To design our full-adder cells, CNFETs with three different threshold voltages (low threshold, normal threshold, and high threshold) are used. First design generates SUM and COUT through separate transistors, and second design is a multi-output dynamic full adder. Proposed full adders are simulated using HSPICE based on CNFET model with 0.9 V supply voltages. Simulation result shows that the proposed designs consume less power and have low power-delay product compared to other CNFET-based full-adder cells.
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Design Example: Capacitance Multiplier Circuit
The circuit illustrated in Figure 1 below incorporates two op-amps, with the first operating as a voltage follower and the second acting as an inverting amplifier.
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