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Published on: October 28, 2018
A programmable triangular neighborhood function for a Kohonen self-organizing map implemented on chip
Marta Kolasa1, Rafał Długosz, Witold Pedrycz
1University of Technology and Life Sciences, The Faculty of Telecommunications and Electrical Engineering, Kaliskiego 7, 85-796, Bydgoszcz, Poland. markol@utp.edu.pl
This study presents an efficient hardware implementation of a triangular function for ultra-low power self-organizing maps (SOMs). The proposed triangular neighborhood function (TNF) offers a faster, simpler alternative to Gaussian functions, enabling rapid adaptation in ASICs.
Area of Science:
- Integrated Circuit Design
- Artificial Neural Networks
- Hardware Acceleration
Background:
- Self-Organizing Maps (SOMs) are crucial for unsupervised learning and data visualization.
- Existing SOM implementations often face limitations in speed and power consumption, especially in hardware.
- Neighborhood functions, like the Gaussian Neighborhood Function (GNF), are key components influencing SOM performance.
Purpose of the Study:
- To introduce an efficient transistor-level implementation of a flexible, programmable Triangular Function (TF).
- To utilize this TF as a Triangular Neighborhood Function (TNF) for ultra-low power SOMs realized as Application-Specific Integrated Circuits (ASICs).
- To demonstrate that the proposed TNF approximates the GNF effectively while offering simpler hardware implementation and improved speed.
Main Methods:
- Transistor-level implementation of a programmable Triangular Function (TF).
- Integration of the TF as a Triangular Neighborhood Function (TNF) within a larger neighborhood mechanism for SOMs.
- Extensive simulations using software models and Hspice for transistor-level verification under various conditions (e.g., supply voltage, temperature).
Main Results:
- The TNF provides a hardware-efficient approximation of the GNF.
- The parallel implementation achieves rapid distance calculations (≤11 ns) and output value computation (≤6 ns), enabling full map adaptation in ≤17 ns.
- Ultra-low power SOMs realized with this TNF are significantly faster (hundreds of times) than PC-based implementations.
- Low signal resolutions (3-6 bits) for the TNF output do not compromise the SOM's learning abilities.
Conclusions:
- The proposed transistor-level TNF offers a highly efficient and fast solution for ultra-low power SOMs in ASICs.
- This approach simplifies hardware implementation compared to GNF while maintaining performance.
- The design demonstrates robustness across different operating conditions and signal resolutions, making it suitable for commercial applications.
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