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Related Experiment Video

Updated: May 28, 2026

Use of Sacrificial Nanoparticles to Remove the Effects of Shot-noise in Contact Holes Fabricated by E-beam Lithography
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Pixelated source mask optimization for process robustness in optical lithography.

Ningning Jia1, Edmund Y Lam

  • 1Imaging Systems Laboratory, Department of Electrical and Electronic Engineering, The University of Hong Kong, Pokfulam Road, Hong Kong.

Optics Express
|October 15, 2011
PubMed
Summary
This summary is machine-generated.

This study introduces pixelated source-mask optimization (SMO) to improve lithography resolution. By incorporating statistical variations, this method enhances process robustness for smaller circuit patterns.

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Area of Science:

  • Semiconductor Manufacturing
  • Optical Engineering
  • Computational Lithography

Background:

  • Optical lithography is crucial for semiconductor manufacturing, enabling smaller circuit patterns.
  • Shrinking feature sizes exacerbate lithographic process variations, impacting yield and reliability.
  • Source-Mask Optimization (SMO) offers a path to higher resolution by co-designing source and mask patterns.

Purpose of the Study:

  • To develop a robust pixelated Source-Mask Optimization (SMO) technique.
  • To explicitly incorporate statistical process variations into the SMO framework.
  • To enhance the process robustness of optical lithography for advanced semiconductor nodes.

Main Methods:

  • Developed a pixelated Source-Mask Optimization (SMO) approach.
  • Utilized inverse imaging principles for optimization.
  • Integrated explicit modeling of statistical variations within the optimization framework.

Main Results:

  • Demonstrated the efficacy of the proposed pixelated SMO method through simulations.
  • Showcased significant enhancement in process robustness.
  • Validated the ability to achieve higher resolution imaging with improved variation tolerance.

Conclusions:

  • Pixelated SMO with explicit variation incorporation is effective for improving lithographic process robustness.
  • This approach addresses critical challenges in manufacturing advanced semiconductor devices.
  • The developed method provides a viable strategy for next-generation lithography design.