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Custom single-photon avalanche diode with integrated front-end for parallel photon timing applications.

C Cammi1, F Panzeri, A Gulinatti

  • 1Dipartimento di Elettronica e Informazione, Politecnico di Milano, Milano 20133, Italy.

The Review of Scientific Instruments
|April 3, 2012
PubMed
Summary
This summary is machine-generated.

Single-photon avalanche diodes (SPADs) are crucial for timing applications. This study introduces a novel pixel architecture for custom SPAD arrays, maintaining individual detector performance in parallel systems.

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Area of Science:

  • Photonics and Optoelectronics
  • Solid-State Devices
  • Integrated Circuits

Background:

  • Single-photon avalanche diodes (SPADs) are solid-state alternatives to photomultiplier tubes (PMTs) for single-photon timing.
  • Custom SPADs offer excellent performance: low dark count rate (DCR), high photon detection efficiency (PDE), and precise temporal resolution (30 ps FWHM).
  • Increasing demand for parallel measurement systems necessitates monolithic SPAD arrays, posing electrical challenges like crosstalk and timing resolution.

Purpose of the Study:

  • To develop a pixel architecture for custom SPAD arrays that preserves individual channel performance.
  • To address the electrical challenges of high parallel temporal resolution and minimized crosstalk in SPAD arrays.
  • To enable the fabrication of high-performance SPAD arrays using custom technologies.

Main Methods:

  • Proposed a novel pixel architecture integrating the timing signal pick-up circuit directly next to the photodiode.
  • Modified the fabrication process flow for custom SPADs to integrate front-end electronics.
  • Utilized an external standard CMOS active quenching circuit for stable performance at high count rates.

Main Results:

  • Achieved a pixel architecture where each SPAD channel retains the performance of a single detector.
  • Successfully minimized electrical crosstalk between channels in the array.
  • Demonstrated stable timing performance at count rates exceeding 1 MHz.

Conclusions:

  • The proposed pixel architecture enables the development of high-performance custom SPAD arrays.
  • This approach overcomes limitations of standard CMOS technologies for SPAD array integration.
  • The solution facilitates advanced parallel single-photon timing applications.