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Power-efficient simulation of detailed cortical microcircuits on SpiNNaker
Thomas Sharp1, Francesco Galluppi, Alexander Rast
1School of Computer Science, The University of Manchester, Manchester, M13 9PL, UK. thomas.sharp@cs.man.ac.uk
Journal of Neuroscience Methods
|April 3, 2012
Summary
The SpiNNaker computer architecture enables fast, power-efficient simulations of brain circuits. This novel hardware achieves unprecedented low energy consumption for simulating neural matter, making large-scale brain modeling more feasible.
Area of Science:
- Computational neuroscience
- Neuroscience
- Computer architecture
Background:
- Computer simulations are crucial for understanding brain function.
- Existing models of cortical circuits are limited by slow speeds and high power consumption.
- The intricate structure of the cortex has been mapped, providing data for simulations.
Purpose of the Study:
- To introduce the SpiNNaker computer architecture for efficient brain simulations.
- To demonstrate real-time simulation of a large cortical circuit.
- To assess the power efficiency of the SpiNNaker hardware for neural modeling.
Main Methods:
- Utilized four SpiNNaker chips to simulate a cortical circuit.
- Modeled ten thousand spiking neurons and four million synapses in real-time.
- Measured energy consumption per neuron and per postsynaptic potential.
Main Results:
- Achieved an energy consumption of 100 nJ/neuron/ms and 43 nJ/post-synaptic potential.
- Demonstrated real-time simulation capabilities on a large-scale neural network.
- The SpiNNaker hardware exhibited the lowest reported energy consumption for digital computer simulations.
Conclusions:
- SpiNNaker offers a power-efficient solution for large-scale brain simulations.
- This architecture approaches fast, power-feasible, and scientifically useful simulations of cortical areas.
- The findings pave the way for more extensive and practical computational neuroscience research.

