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Modeling for multilevel switching in oxide-based bipolar resistive memory.

Ji-Hyun Hur1, Kyung Min Kim, Man Chang

  • 1Semiconductor Laboratory, Samsung Advanced Institute of Technology, Gyeonggi-Do 446-712, Korea.

Nanotechnology
|May 11, 2012
PubMed
Summary
This summary is machine-generated.

Researchers developed a physical model for multilevel switching in oxide-based resistive memory (ReRAM). This model accurately describes the wide range of switching speeds observed in tantalum-oxide ReRAM devices.

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Area of Science:

  • Materials Science
  • Electrical Engineering
  • Solid-State Physics

Background:

  • Resistive Random-Access Memory (ReRAM) offers promising non-volatile memory solutions.
  • Achieving multilevel switching is crucial for increasing memory density.
  • Understanding the physical mechanisms behind ReRAM switching is essential for device optimization.

Purpose of the Study:

  • To propose and validate a physical model for multilevel switching in oxide-based bipolar ReRAM.
  • To explain the diverse switching timescales observed in ReRAM devices.
  • To provide a quantitative description of multilevel switching behavior.

Main Methods:

  • Development of a physical model for multilevel switching.
  • Experimental validation using tantalum-oxide-based ReRAM.
  • Modification of reset voltages to achieve multi-resistance levels.
  • Analysis of switching timescales ranging from 10^-7 s to 10^0 s.

Main Results:

  • The proposed physical model successfully describes multilevel switching in oxide bipolar ReRAM.
  • Experimental results with tantalum-oxide ReRAM confirm the model's validity.
  • The model quantitatively explains the significant variation in switching timescales (10^-7 s to 10^0 s) linked to small reset voltage differences.

Conclusions:

  • A simple yet effective physical model for oxide bipolar ReRAM multilevel switching has been established.
  • The model provides both qualitative and quantitative insights into the switching dynamics.
  • This work facilitates the design and optimization of high-density ReRAM devices.