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Updated: May 18, 2026

Flow-assisted Dielectrophoresis: A Low Cost Method for the Fabrication of High Performance Solution-processable Nanowire Devices
Published on: December 7, 2017
Observation of 1D behavior in Si nanowires: toward high-performance TFETs
Ramon B Salazar1, Saumitra R Mehrotra, Gerhard Klimeck
1Birck Nanotechnology Center, Purdue University, 1205 W. State Street, West Lafayette, Indiana 47907, USA. ramon@purdue.edu
Abstract:
This article provides experimental evidence of one-dimensional behavior of silicon (Si) nanowires (NWs) at low-temperature through both transfer (I(d)-V(G)) and capacitance-voltage characteristics. For the first time, operation of Si NWs in the quantum capacitance limit (QCL) is experimentally demonstrated and quantitatively analyzed. This is of relevance since working in the QCL may allow, e.g., tunneling field-effect transistors (TFETs) to achieve higher on-state currents (I(on)) and larger on-/off-state current ratios (I(on)/I(off)), thus addressing one of the most severe limitations of TFETs. Comparison of the experimental data with simulations finds excellent agreement using a simple capacitor model.

