Suspended sub-50 nm vanadium dioxide membrane transistors: fabrication and ionic liquid gating studies

We demonstrate a robust lithographic patterning method to fabricate self-supported sub-50 nm VO(2) membranes that undergo a phase transition. Utilizing such self-supported membranes, we directly observed a shift in the metal-insulator transition temperature arising from stress relaxation and consistent opening of the hysteresis. Electric double layer transistors were then fabricated with the membranes and compared to thin film devices. The ionic liquid allowed reversible modulation of channel resistance and distinguishing bulk processes from the surface effects. From the shift in the metal-insulator transition temperature, the carrier density doped through electrolyte gating is estimated to be 1 × 10(20) cm(-3). Hydrogen annealing studies showed little difference in resistivity between the film and the membrane indicating rapid diffusion of hydrogen in the vanadium oxide rutile lattice consistent with previous observations. The ability to fabricate electrically-wired, suspended VO(2) ultra-thin membranes creates new opportunities to study mesoscopic size effects on phase transitions and may also be of interest in sensor devices.