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Related Concept Videos

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Assembly and Characterization of Biomolecular Memristors Consisting of Ion Channel-doped Lipid Membranes
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Published on: March 9, 2019

Dynamic-load-enabled ultra-low power multiple-state RRAM devices.

Xiang Yang1, I-Wei Chen

  • 1Department of Materials Science and Engineering, University of Pennsylvania, Philadelphia, PA 19104-6272, USA.

Scientific Reports
|October 19, 2012
PubMed
Summary
This summary is machine-generated.

Researchers developed a novel asymmetric dynamic load for nanometallic resistance-random-access-memory (RRAM) devices. This innovation significantly reduces switching power, enabling ultra-low power non-volatile memory applications.

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Area of Science:

  • Materials Science
  • Electrical Engineering
  • Nanotechnology

Background:

  • Bipolar resistance-switching materials enable non-volatile memory with potential for reduced power consumption.
  • Intermediate resistance states in these materials offer opportunities for further power reduction.
  • Existing nanometallic resistance-random-access-memory (RRAM) devices face challenges in minimizing switching power.

Purpose of the Study:

  • To introduce an asymmetric dynamic load into nanometallic RRAM devices.
  • To significantly reduce the power required for switching operations in RRAM.
  • To enable reliable access to intermediate resistance states for enhanced memory functionality.

Main Methods:

  • Integration of an asymmetric dynamic load into a nanometallic RRAM device architecture.
  • Characterization of the load's behavior during on-switching and off-switching cycles.
  • Exploration of wave-function decay in a novel nanometallic random material to enhance dynamic range.

Main Results:

  • The asymmetric dynamic load reliably lowers switching power by orders of magnitude.
  • The load is highly resistive during on-switching, facilitating access to intermediate states.
  • The load vanishes during off-switching, enabling low-voltage operation.
  • Projected power consumption is as low as 12 nW for a 100x100 nm² device and 500 pW for a 10x10 nm² device.
  • Further power reduction to potentially 1 pW for a 10x10 nm² device is achievable.

Conclusions:

  • The asymmetric dynamic load is a scalable and effective approach for reducing RRAM switching power.
  • This method is applicable to various bipolar RRAM devices with intermediate states.
  • The technology paves the way for ultra-low power non-volatile memory solutions.