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Related Concept Videos

Imperfections in Crystal Structure: Stoichiometric Point Defects01:26

Imperfections in Crystal Structure: Stoichiometric Point Defects

Schottky defects arise when some lattice points in a crystal, such as those in NaCl, remain unoccupied, creating lattice vacancies without disturbing the overall electrical neutrality of the crystal. This defect is common in ionic crystals where the positive and negative ions are similar in size, as seen in sodium chloride and cesium chloride. The presence of Schottky defects enables the crystal to conduct electricity to a small extent through an ionic mechanism. Electric fields cause nearby...
Types of Semiconductors01:20

Types of Semiconductors

Intrinsic semiconductors are highly pure materials with no impurities. At absolute zero, these semiconductors behave as perfect insulators because all the valence electrons are bound, and the conduction band is empty, disallowing electrical conduction. The Fermi level is a concept used to describe the probability of occupancy of energy levels by electrons at thermal equilibrium. In intrinsic semiconductors, the Fermi level is positioned at the midpoint of the energy gap at absolute zero. When...
Imperfections in Crystal Structure: Non-Stoichiometric Defects01:29

Imperfections in Crystal Structure: Non-Stoichiometric Defects

Non-stoichiometric defects refer to a type of defect in the crystal structure of a compound where the ratio of its constituent elements deviates from the ideal stoichiometric ratio. There are two main types of non-stoichiometric defects: metal excess defects and metal deficiency defects.Metal excess defects occur when there is a slight surplus of metal ions than what is required by the stoichiometric ratio of the compound. For example, heating a sodium chloride crystal in sodium vapor results...
Imperfections in Crystal Structure: Point, Line and Plane Defects01:25

Imperfections in Crystal Structure: Point, Line and Plane Defects

A perfect crystal, in theory, has a uniform structure with the same unit cell and lattice points throughout. However, any deviation from this periodic arrangement is known as an imperfection or defect. These defects can be categorized into three types: point, line, and plane defects.Point defects occur when there is a deviation from the ideal due to missing atoms, displaced atoms, or additional atoms. These imperfections might occur due to imperfect packing during crystallization or because of...
Biasing of Metal-Semiconductor Junctions01:27

Biasing of Metal-Semiconductor Junctions

Biasing metal-semiconductor junctions involves applying a voltage across the junction. Specifically, the metal is connected to a voltage source, while the semiconductor is grounded. This technique is essential for controlling the direction and magnitude of current flow in electronic devices, including diodes, transistors, and photovoltaic cells.
In Schottky junctions, where the semiconductor is n-type, applying a positive voltage to the metal relative to the semiconductor reduces its Fermi...

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Updated: May 12, 2026

Flow-assisted Dielectrophoresis: A Low Cost Method for the Fabrication of High Performance Solution-processable Nanowire Devices
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Rational defect introduction in silicon nanowires.

Naechul Shin1, Miaofang Chi, Jane Y Howe

  • 1School of Chemical & Biomolecular Engineering, Georgia Institute of Technology, Atlanta, Georgia 30332, USA.

Nano Letters
|April 13, 2013
PubMed
Summary

Researchers precisely control defects in silicon nanowires by adjusting growth conditions. This enables the creation of novel defect superstructures, offering new ways to engineer semiconductor properties.

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Area of Science:

  • Materials Science
  • Nanotechnology
  • Semiconductor Physics

Background:

  • Controlled introduction of planar defects like twin boundaries and stacking faults is difficult in group IV nanowires.
  • These defects are common in other nanowire systems (II-VI, III-V) and influence material properties.

Purpose of the Study:

  • To demonstrate a method for rationally generating transverse twin boundaries and angled stacking faults in silicon nanowires.
  • To utilize this method for creating prototype defect superstructures.
  • To gain insight into defect generation mechanisms in semiconductor nanowires.

Main Methods:

  • Utilizing user-programmable changes to precursor pressure and growth temperature during the growth of <111> oriented silicon nanowires.
  • Leveraging controlled defect generation to create defect superstructures.

Main Results:

  • Successfully generated both transverse twin boundaries and angled stacking faults in silicon nanowires.
  • Demonstrated the creation of prototype defect superstructures using the controlled defects.
  • Provided insights into the mechanism of defect generation in semiconductor nanowires.

Conclusions:

  • User-programmable control over precursor pressure and growth temperature enables rational generation of defects in silicon nanowires.
  • This capability allows for the engineering of defect superstructures.
  • Findings offer new pathways for tailoring the properties of silicon semiconductors.