Self-induced gate dielectric for graphene field-effect transistor

Area of Science:

• Materials Science
• Nanotechnology
• Electronics

Background:

• Graphene-field-effect transistors (G-FETs) are promising for next-generation electronics.
• Performance degradation and fabrication challenges hinder G-FETs' practical application.
• Novel device architectures are needed to improve G-FET stability and performance.

Purpose of the Study:

• To investigate the electronic characteristics of a novel G-FET architecture.
• To demonstrate the efficacy of a ZnO microwire top-gate electrode with a self-induced dielectric layer.
• To address performance degradation and fabrication complexities in G-FETs.

Main Methods:

• Fabrication of G-FETs utilizing a ZnO microwire as the top-gate electrode.
• Formation of a self-induced dielectric layer via surface-adsorbed oxygen on the ZnO microwire.
• Characterization of device performance, including on-current, on/off ratio, and carrier mobility at room temperature.

Main Results:

• Achieved a high on-current of 175 μA.
• Obtained an excellent on/off current ratio of 55.
• Demonstrated high hole mobility (>1630 cm²/Vs) and electron mobility (>1240 cm²/Vs).

Conclusions:

• The novel G-FET structure with a ZnO microwire gate and self-induced dielectric layer exhibits superior electronic characteristics.
• The self-induced dielectric process effectively prevents graphene doping and defects, simplifying fabrication.
• This avant-garde design offers a viable solution to overcome performance degradation in G-FETs.