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Related Concept Videos

Metal-Semiconductor Junctions01:24

Metal-Semiconductor Junctions

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The contact of metal and semiconductor can lead to the formation of a junction with either Schottky or Ohmic behavior.
Schottky Barriers
Schottky barriers arise when a metal with a work function (Φm) contacts a semiconductor with a different work function (Φs). Initially, electrons transfer until the Fermi levels of the metal and semiconductor align at equilibrium. For instance, if Φm > Φs, the semiconductor Fermi level is higher than the metal's before contact. The...
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A p-n junction is formed when p-type and n-type semiconductor materials are joined together. At the interface of the p-n junction, holes from the p-side and electrons from the n-side begin to diffuse into the opposite sides due to the concentration gradient. This diffusion of carriers leads to a region around the junction where there are no free charge carriers, known as the depletion region. The charge density within the depletion region for the n-side and p-side can be described by the...
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Intrinsic semiconductors are highly pure materials with no impurities. At absolute zero, these semiconductors behave as perfect insulators because all the valence electrons are bound, and the conduction band is empty, disallowing electrical conduction. The Fermi level is a concept used to describe the probability of occupancy of energy levels by electrons at thermal equilibrium. In intrinsic semiconductors, the Fermi level is positioned at the midpoint of the energy gap at absolute zero. When...
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Related Experiment Video

Updated: May 6, 2026

Developing High Performance GaP/Si Heterojunction Solar Cells
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Vertical nanowire heterojunction devices based on a clean Si/Ge interface.

Lin Chen1, Wayne Y Fung, Wei Lu

  • 1Department of Electrical Engineering and Computer Science, The University of Michigan , Ann Arbor, Michigan 48109, United States.

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|October 19, 2013
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Summary
This summary is machine-generated.

Vertical Germanium (Ge) and Silicon (Si) nanowire heterojunctions demonstrate excellent electronic properties. These Si/Ge nanowire devices show potential for next-generation high-performance electronics.

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Area of Science:

  • Semiconductor Physics
  • Materials Science
  • Nanotechnology

Background:

  • Fabrication of vertical Germanium (Ge) nanowires epitaxially grown on Silicon (Si) substrates at low temperatures.
  • Achieving sharp and clean Si/Ge interfaces with controlled doping profiles.

Purpose of the Study:

  • To characterize the electrical properties of various vertical Si/Ge nanowire heterojunctions.
  • To explore the potential of these heterojunctions for advanced electronic devices.

Main Methods:

  • Epitaxial growth of Ge nanowires on Si substrates.
  • Material analysis and electrical characterization of fabricated devices.
  • Development of raised Si/Ge structures using self-aligned etch processes.

Main Results:

  • nSi/pGe diodes exhibited an ideality factor of 1.16 and a rectifying ratio of 10^6.
  • n+Si/p+Ge structures functioned as Esaki tunnel diodes with high peak tunneling current (4.57 kA/cm^2) and negative differential resistance.
  • p+Si/pGe structures demonstrated rectifying behavior, highlighting challenges in achieving Ohmic contacts.

Conclusions:

  • The Si/Ge nanowire system provides a clean heterojunction interface with low defect density.
  • These heterojunctions hold significant potential for developing high-density and high-performance electronic devices, including tunneling field-effect transistors (TFETs).
  • The study validates theoretical models using bulk properties, confirming the reliability of the Si/Ge nanowire platform.