Interface properties of atomic layer deposited TiO2/Al2O3 films on In(0.53)Ga(0.47)As/InP substrates

Electrical and interfacial properties of metal-oxide-semiconductor (MOS) capacitors fabricated using atomic layer deposited bilayer TiO2/Al2O3 films on In0.53Ga0.47As/InP substrates are reported. Vacuum annealing at 350 °C is shown to improve the interface quality. Capacitance-voltage (C-V) characteristics with higher accumulation capacitance, negligible frequency dispersion, small hysteresis and low interface state density (∼1.5 × 10(11) cm(-2) eV(-1)) have been observed for MOS capacitors. Low frequency (1/f) noise characterization and inelastic electron tunneling spectroscopy (IETS) studies have been performed to determine defects and interface traps and explain the lattice dynamics and trap state generation mechanisms. Both the IETS and 1/f noise studies reveal the spatial locations of the traps near the interface and also the nature of the traps. The IETS study further revealed the dynamic evolution of trap states related to low frequency noise sources in the deposited TiO2/Al2O3 stacks. It is shown that deposition of an ultrathin layer of TiO2 on Al2O3 can effectively control the diffusion of As in the dielectric and the oxidation states of In and Ga at the In0.53Ga0.47As surface.