XOR and XNOR operations at 12.5 Gb/s using cascaded carrier-depletion microring resonators

We report the implementation of the XOR and XNOR logical operations using an electro-optic circuit, which is fabricated by CMOS-compatible process in the silicon-on-insulator (SOI) platform. The circuit consists of two cascaded add-drop microring resonators (MRRs), which are modulated through electric-field-induced carrier depletion in reverse biased pn junctions embedded in the ring waveguides. The resonance wavelength mismatch between the two nominally identical MRRs caused by fabrication errors is compensated by thermal tuning. Simultaneous bitwise XOR and XNOR operations of the two electrical modulating signals at the speed of 12.5 Gb/s are demonstrated. And 20 Gb/s XOR operation at one output port of the circuit is achieved. We explain the phenomena that one half of the resonance regions of the device are much more sensitive to the round-trip phase shift in the ring waveguides than the other half resonance regions. Characteristic graphs with logarithmic phase coordinate are proposed to analyze the sensitivity of the demonstrated circuit, as well as several typical integrated optical structures. It is found that our circuit with arbitrary chosen parameters has similar sensitivity to MRRs under the critical coupling.