Continuous-time ΣΔ ADC with implicit variable gain amplifier for CMOS image sensor.

Area of Science:

• Electrical Engineering
• Microelectronics
• Image Sensor Technology

Background:

• Mega-pixel resolution CMOS image sensors (CIS) demand efficient analog-to-digital converters (ADCs).
• Traditional column-parallel ADCs face challenges in power consumption and noise performance for high-resolution applications.

Purpose of the Study:

• To present a novel column-parallel continuous-time sigma delta (CTSD) ADC tailored for mega-pixel CIS.
• To reduce power consumption and chip area while maintaining noise performance in CIS ADCs.

Main Methods:

• Implementation of a 2nd order resistor/capacitor-based loop filter for the CTSD modulator.
• Utilizing a conventional operational transconductance amplifier (OTA) for the first integrator and a single-ended inverter-based amplifier for the second.
• Integration of a variable gain amplifier function into the CTSD modulator's front-end by programming input resistance.

Main Results:

• Achieved reduced power consumption (< 63.5 μW) without sacrificing noise performance.
• Integrated variable gain functionality (8 scales) without additional power or chip area.
• Fabricated prototype using 0.18 μm CMOS process, operating at 1.4 V and 50 MHz clock frequency.

Conclusions:

• The developed CTSD ADC offers a power-efficient solution for high-resolution CMOS image sensors.
• The novel amplifier design and integrated gain function demonstrate significant advantages in power and area reduction.