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Reflection reduction on DDR3 high-speed bus by improved PSO.

Huiyong Li1, Hongxu Jiang1, Bo Li1

  • 1Beijing Key Laboratory of Digital Media, School of Computer Science and Engineering, Beihang University, Beijing 100191, China.

Thescientificworldjournal
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Summary

This study introduces a new method to reduce signal reflection in DDR3 buses by optimizing impedance mismatch. The improved particle swarm optimization algorithm enhances signal transmission quality by 1.3 dB.

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Area of Science:

  • Electrical Engineering
  • Computer Engineering
  • Signal Processing

Background:

  • Signal integrity is crucial for high-speed digital systems.
  • Impedance mismatch in DDR3 buses causes significant signal reflection, degrading performance.
  • Existing methods for mitigating signal reflection have limitations.

Purpose of the Study:

  • To propose a novel optimization method for impedance mismatch in DDR3 buses.
  • To reduce signal reflection and improve signal transmission quality.
  • To develop an advanced optimization algorithm for this specific problem.

Main Methods:

  • Established an equivalent model for DDR3 high-speed signal transmission incorporating via parasitic effects.
  • Matched the on-die-termination (ODT) value of DDR3 with the transmission line's characteristic impedance.
  • Developed an improved particle swarm optimization algorithm with adaptive perturbation (IPSO-IMp) to solve impedance mismatch.

Main Results:

  • The IPSO-IMp algorithm demonstrated higher accuracy compared to standard algorithms.
  • The optimization speed increased by approximately 33% with the IPSO-IMp algorithm.
  • Simulation results confirmed a significant reduction in signal reflection.

Conclusions:

  • The proposed method effectively optimizes impedance mismatch in DDR3 buses.
  • Signal transmission quality was improved by 1.3 dB compared to existing methods.
  • The IPSO-IMp algorithm offers a more accurate and efficient solution for signal integrity issues.