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Updated: Apr 28, 2026

Flow-assisted Dielectrophoresis: A Low Cost Method for the Fabrication of High Performance Solution-processable Nanowire Devices
Published on: December 7, 2017
Large scale low cost fabrication of diameter controllable silicon nanowire arrays
Leimeng Sun1, Yu Fan, Xinghui Wang
1Nanoelectronics Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore.
Abstract:
We report on a novel solution etching method to fabricate vertically aligned aperiodic silicon nanowire (SiNW) arrays. We begin with a simple dewetting process to fabricate a monolayer of well-spaced metal particles in situ on a silicon wafer. The particles function as a sacrificial template to pattern a Ti/Au catalyst film into a metal mesh and the size of particles directly determines the diameter of SiNW. A conventional metal-assisted chemical etching process is then carried out with the obtained metal mesh as a catalyst to realize a vertically aligned SiNW array at a large scale and low cost.

