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Study of multi-level characteristics for 3D vertical resistive switching memory
Yue Bai1, Huaqiang Wu2, Riga Wu3
1Institute of Microelectronics, Tsinghua University, Beijing, China, 100084.
Scientific Reports
|July 23, 2014
Summary
This study demonstrates high-performance three-layer 3D vertical resistive random access memory (RRAM) cells. Four-level multi-level cell (MLC) operation was achieved using current and voltage controlled schemes for ultra-high density storage.
Area of Science:
- Materials Science
- Electrical Engineering
- Nanotechnology
Background:
- Ultra-high density data storage is crucial for modern applications.
- Three-dimensional (3D) integration and multi-level cell (MLC) technologies offer pathways to increase storage density.
- Resistive random access memory (RRAM) is a promising non-volatile memory technology.
Purpose of the Study:
- To fabricate and characterize three-layer 3D vertical AlOδ/Ta2O5-x/TaOy RRAM devices.
- To demonstrate and compare current controlled scheme (CCS) and voltage controlled scheme (VCS) for four-level MLC operation in 3D vertical RRAM.
- To investigate the switching mechanism and array applicability of these devices.
Main Methods:
- Fabrication of three-layer 3D vertical RRAM structures.
- Electrical characterization including endurance, retention, and I-V curves.
- Temperature-dependent transport measurements to elucidate switching mechanisms.
- Resistor network circuit simulations to evaluate array performance.
Main Results:
- The fabricated 3D vertical RRAM cells exhibited excellent uniformity and performance, including >1000X HRS/LRS windows, >10^10 endurance cycles, and >10^4 s retention at 125°C.
- Successful demonstration of four-level MLC operation using both CCS and VCS.
- Analysis of temperature-dependent transport characteristics provided insights into the switching mechanism.
- Circuit simulations compared the array applicability of CCS and VCS.
Conclusions:
- Three-layer 3D vertical RRAM with AlOδ/Ta2O5-x/TaOy exhibits high performance and uniformity, suitable for mass storage.
- Four-level MLC operation is feasible in 3D vertical RRAM, with CCS and VCS offering different operational strategies.
- Understanding the switching mechanism aids in optimizing device design and array integration for future memory technologies.
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