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Toward high-performance digital logic technology with carbon nanotubes.

George S Tulevski1, Aaron D Franklin, David Frank

  • 1IBM TJ Watson Research Center , 1101 Kitchawan Road, Yorktown Heights, New York 10598, United States.

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Carbon nanotubes (CNTs) offer a path beyond silicon CMOS scaling. Overcoming materials challenges in purity and placement is key for next-generation computing technologies.

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carbon nanotubeslogicpost-CMOS

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Area of Science:

  • Materials Science
  • Semiconductor Physics
  • Nanotechnology

Background:

  • Traditional silicon complementary metal-oxide-semiconductor (CMOS) scaling is slowing, necessitating new technologies.
  • Carbon nanotubes (CNTs) possess unique properties like ultrathin bodies and ballistic transport, making them promising for post-silicon electronics.

Purpose of the Study:

  • To review the potential of carbon nanotube (CNT) based computing.
  • To outline the key materials-related challenges for CNT logic technology.
  • To highlight recent progress in addressing these challenges.

Main Methods:

  • Literature review of carbon nanotube (CNT) research for semiconductor applications.
  • Analysis of performance advantages and scaling potential of CNTs.
  • Examination of materials challenges including purity and placement.

Main Results:

  • CNTs exhibit intrinsic transport and scaling properties suitable for future semiconductor devices.
  • Key challenges include achieving high purity and precise placement of CNTs at nanoscale pitches (∼5 nm).
  • Recent advancements show progress in overcoming these materials-related hurdles.

Conclusions:

  • CNT-based computing holds significant promise for the post-silicon era.
  • Addressing materials science challenges is critical for realizing CNT technology.
  • Continued research and development efforts are essential for future impact.