A novel sample based quadrature phase shift keying demodulator

Area of Science:

• Electrical Engineering
• Digital Communications
• Signal Processing

Background:

• Conventional Quadrature Phase-Shift Keying (QPSK) demodulation relies on coherent detection, which is sensitive to frequency variations and phase noise.
• Traditional methods require a high signal-to-noise ratio (SNR) for acceptable bit error rates (BER).
• Power-hungry components like Voltage Controlled Oscillators (VCOs) and mixers are integral to existing QPSK receivers.

Purpose of the Study:

• To present a new practical QPSK receiver design.
• To enhance robustness against phase noise.
• To significantly reduce power consumption during demodulation.

Main Methods:

• Utilizing digitized samples of the incoming analog QPSK signal to determine symbol phase.
• Implementing the proposed design via software simulation in MATLAB Simulink.
• Comparing performance metrics (SNR, BER, power consumption) against conventional methods.

Main Results:

• The proposed QPSK receiver achieves a bit error rate (BER) of 10⁻⁶ with a 5 dB signal-to-noise ratio (SNR), compared to 10 dB for conventional systems.
• Power consumption is reduced by 68.8% to 99.6% due to the elimination of components like VCO, mixer, and low-pass filter (LPF).
• The technique demonstrates increased robustness to phase noise compared to coherent detection.

Conclusions:

• The developed QPSK receiver offers a more power-efficient and robust alternative to traditional demodulation techniques.
• Digitized sample-based phase determination is a viable strategy for improving QPSK receiver performance.
• This innovation has significant implications for low-power digital communication applications.